I/O PORT CONNECTOR
Connector J1 provides access to the AP52233SLK I/O signals. Signal positions not shown
listed are not connected on the board.
VDD
VSS
UTXD1
URXD1
URTS1*
UCTS1*
GPT0
GPT1
QSPI_DOUT
QSPI_DIN
QSPI_SCLK
QSPO_CS0
UTXD0
TRXD0
URTS0*
UCTS0*
IRQ1*
SYNCA
SYNCB
IRQ7*
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
IRQ4*
RSTI*
RSTO*
NC
ANO
AN1
AN2
AN3
AN4
AN5
AN6
AN7
SCL
SDA
GPT2
GPT3
TIN0
TIN1
TIN2
TIN3
Figure 9: MCU I/O Port Connector
OPERATING MODES
The AP52233SLK board operates in two basic modes Run Mode, or Debug Mode.
Run Mode executes user application code from Power-On or Reset, if the RESET vector is
programmed.
Debug Mode supports the development and debug of applications via the integrated USB
BDM. An optional BDM_PORT is provided but not installed.
See the related sections below for quickly starting the board in the desired mode of operation.
The board has been preloaded with a USB stack and open-source RTOS. Refer to the
GETTING STARTED section of this document for further details.
RUN Mode
Run mode executes the user application out of FLASH when power is applied to the board or
the RESET button is pressed. Of course, the RESET vector must be programmed to allow
application code to execute. Use the following settings to configure the AP52233SLK for
RUN Mode using the USB bus to power the board. See the POWER section below for details
16
Freescale Semiconductor
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